डेटा पत्रक ( Datasheet PDF ) |
भाग संख्या | विवरण | मैन्युफैक्चरर्स | |
ZL30110 | Telecom Rate Conversion DPLL ZL30110 Telecom Rate Conversion DPLL
Features
• Synchronizes to 8 kHz, 2.048 MHz, 8.192 MHz or 16.384 MHz
• Provides a range of output clocks:
• 65.536 MHz TDM clock locked to the input reference
• Gen |
Zarlink Semiconductor |
|
ZL30116 | SONET/SDH Low Jitter System Synchronizer | Zarlink Semiconductor |
|
ZL30117 | SONET/SDH Low Jitter Line Card Synchronizer | Zarlink Semiconductor |
|
ZL30112 | SLIC/CODEC DPLL | Zarlink Semiconductor |
|
ZL30111 | POTS Line Card PLL | Zarlink Semiconductor |
|
ZL30110 | Telecom Rate Conversion DPLL | Zarlink Semiconductor |
|
ZL30119 | Low Jitter Line Card Synchronizer | Zarlink Semiconductor |
www.DataSheet.in | 2017 | संपर्क |