डेटा पत्रक ( Datasheet PDF ) |
भाग संख्या | विवरण | मैन्युफैक्चरर्स | |
SN74LS27 | TRIPLE 3-INPUT NOR GATE TRIPLE 3-INPUT NOR GATE
SN54/74LS27
VCC 14 13 12 11 10
9
8
TRIPLE 3-INPUT NOR GATE LOW POWER SCHOTTKY
1234567 GND
GUARANTEED OPERATING RANGES
Symbol
Parameter
VCC
Supply Voltage
TA Operating Ambient |
Motorola |
|
SN74LS27 | Triple 3-Input Positive-NOR Gates PACKAGE OPTION ADDENDUM
www.ti.com
24-Aug-2018
PACKAGING INFORMATION
Orderable Device JM38510/30302B2A
Status Package Type Package Pins Package
(1)
Drawing
Qty
ACTIVE
LCCC
FK 20
1
Eco Plan
(2)
TBD
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etcTI |
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SN74LS273 | Octal D Flip-Flop SN74LS273
Octal D Flip−Flop with Clear
The SN74LS273 is a high-speed 8-Bit Register. The register consists of eight D-Type Flip-Flops with a Common Clock and an asynchronous active LOW Master Reset. This dev |
ON Semiconductor |
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SN74LS273 | OCTAL D FLIP-FLOP OCTAL D FLIP-FLOP WITH CLEAR
The SN54 / 74LS273 is a high-speed 8-Bit Register. The register consists of eight D-Type Flip-Flops with a Common Clock and an asynchronous active LOW Master Reset. This device is s |
Motorola |
|
SN74LS273 | OCTAL D-TYPE FLIP-FLOP • Contains Eight Flip-Flops With Single-Rail
Outputs
• Buffered Clock and Direct Clear Inputs • Individual Data Input to Each Flip-Flop • Applications Include:
Buffer/Storage Registers Shift Registers P |
etcTI |
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SN74LS279 | QUAD SET-RESET LATCH SN54/74LS279 QUAD SET-RESET LATCH
VCC 16
S1 15
R 14
Q 13
S1 12
S2 11
R 10
Q 9
QUAD SET-RESET LATCH
LOW POWER SCHOTTKY
1 R
2 S1
3 S2
4 Q
5 R
6 S1
7 Q
8 GND
16 1
J SUFFIX CERAMIC CASE 620-09
TR |
Motorola |
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SN74LS279A | QUADRUPLE S-R LATCHES SN54279, SN54LS279A, SN74279, SN74LS279A QUADRUPLE S-R LATCHES
SDLS093 – DECEMBER 1983 – REVISED MARCH 1988
PRODUCTION DATA information is current as of publication date. Products conform to specifications |
etcTI |
www.DataSheet.in | 2017 | संपर्क |