SN74AHC125 डाटा शीट PDF( Datasheet )

SN54AHC125, SN74AHC125 SCLS256O – DECEMBER 1995 – REVISED FEBRUARY 2024 SNx4AHC125 Quadruple Bus Buffer Gates With 3-State Outputs 1 Features • Operating range of 2V to 5.5V • Latch-up performance exce

D Controlled Baseline – One Assembly/Test Site, One Fabrication Site D Extended Temperature Performance of –55°C to 125°C D Enhanced Diminishing Manufacturing Sources (DMS) Support D Enhanced Product-Chan

DQualified for Automotive Applications DESD Protection Exceeds 1000 V Per MIL-STD-883, Method 3015; Exceeds 150 V Using Machine Model (C = 200 pF, R = 0) DEPIC (Enhanced-Performance Implanted CMOS) Process D

SN54AHC125, SN74AHC125 SCLS256O – DECEMBER 1995 – REVISED FEBRUARY 2024 SNx4AHC125 Quadruple Bus Buffer Gates With 3-State Outputs 1 Features • Operating range of 2V to 5.5V • Latch-up performance exce

SN54AHC125, SN74AHC125 SCLS256O – DECEMBER 1995 – REVISED FEBRUARY 2024 SNx4AHC125 Quadruple Bus Buffer Gates With 3-State Outputs 1 Features • Operating range of 2V to 5.5V • Latch-up performance exce

D Q Devices Meet Automotive Performance Requirements D Customer-Specific Configuration Control Can Be Supported Along With Major-Change Approval D EPIC™ (Enhanced-Performance Implanted CMOS) Process D Operati