SN74ACT10 डाटा शीट PDF( Datasheet )

D 4.5-V to 5.5-V VCC Operation D Inputs Accept Voltages to 5.5 V SN54ACT10 . . . J OR W PACKAGE SN74ACT10 . . . D, DB, N, NS, OR PW PACKAGE (TOP VIEW) 1A 1 1B 2 2A 3 2B 4 2C 5 2Y 6 GND 7 14 VCC 13 1C 12 1Y 1

SN74ACT10-Q1 TRIPLE 3-INPUT POSITIVE-NAND GATE D Qualified for Automotive Applications D 4.5-V to 5.5-V VCC Operation D Inputs Accept Voltages to 5.5 V D Max tpd of 9.5 ns at 5 V D Inputs Are TTL-Voltage Compa

• Designed to Ensure Defined Voltage Levels on Floating Bus Lines in CMOS Systems • Reduces Undershoot and Overshoot Caused By Line Reflections • Repetitive Peak Forward Current . . . IFRM = 100 mA • In

• Designed to Ensure Defined Voltage Levels on Floating Bus Lines in CMOS Systems • Reduces Undershoot and Overshoot Caused By Line Reflections • Repetitive Peak Forward Current . . . IFRM = 100 mA • In

D Designed to Ensure Defined Voltage Levels on Floating Bus Lines in CMOS Systems D 4.5-V to 5.5-V VCC Operation D Inputs Accept Voltages to 5.5 V D Reduces Undershoot and Overshoot Caused By Line Reflections D

D Designed to Ensure Defined Voltage Levels on Floating Bus Lines in CMOS Systems D 4.5-V to 5.5-V VCC Operation D Inputs Accept Voltages to 5.5 V D Reduces Undershoot and Overshoot Caused By Line Reflections D

D 4.5-V to 5.5-V VCC Operation D Inputs Accept Voltages to 5.5 V SN54ACT10 . . . J OR W PACKAGE SN74ACT10 . . . D, DB, N, NS, OR PW PACKAGE (TOP VIEW) 1A 1 1B 2 2A 3 2B 4 2C 5 2Y 6 GND 7 14 VCC 13 1C 12 1Y 1