डेटा पत्रक ( Datasheet PDF ) |
भाग संख्या | विवरण | मैन्युफैक्चरर्स | |
SN54LS11 | TRIPLE 3-INPUT AND GATE SN54/74LS11 TRIPLE 3-INPUT AND GATE
TRIPLE 3-INPUT AND GATE
VCC 14 13 12 11 10 9 8
LOW POWER SCHOTTKY
1
2
3
4
5
6
7 GND
14 1
J SUFFIX CERAMIC CASE 632-08
14 1
N SUFFIX PLASTIC CASE 646-06
14 1
D S |
Motorola Inc |
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SN54LS11 | TRIPLE 3-INPUT POSITIVE-AND GATES SN54LS11, SN54S11,
SN74LS11, SN74S11
TRIPLE 3-INPUT POSITIVE-AND GATES
SDLS131 – APRIL 1985 – REVISED MARCH 1988
PRODUCTION DATA information is current as of publication date. Products conform to specifica |
etcTI |
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SN54LS112A | DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP SN54/74LS112A DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP
The SN54 / 74LS112A dual JK flip-flop features individual J, K, clock, and asynchronous set and clear inputs to each flip-flop. When the clock goes HIGH, |
Motorola Inc |
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SN54LS112A | Dual J-K Negative-Edge-Triggered Flip-Flops PACKAGE OPTION ADDENDUM
www.ti.com
24-Aug-2018
PACKAGING INFORMATION
Orderable Device JM38510/07102BEA
Status Package Type Package Pins Package
(1)
Drawing
Qty
ACTIVE
CDIP
J 16 1
Eco Plan
(2)
TBD
J |
etcTI |
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SN54LS113A | DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP SN54/74LS113A DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP
The SN54 / 74LS113A offers individual J, K, set, and clock inputs. These monolithic dual flip-flops are designed so that when the clock goes HIGH, the inp |
Motorola Inc |
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SN54LS114A | DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP SN54/74LS114A DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP
The SN54/ 74LS114A offers common clock and common clear inputs and individual J, K, and set inputs. These monolithic dual flip-flops are designed so that |
Motorola Inc |
www.DataSheet.in | 2017 | संपर्क |