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NT5CB128M8AN DataSheet

No. Partie # Fabricant Description Fiche Technique
1
NT5CB128M8AN

Nanya
1Gb DDR3 SDRAM A-Die
and all of the control and address inputs are synchronized with a pair of externally supplied differential clocks. Inputs are latched at the cross point of differential clocks (CK rising and  falling). All I/Os are synchronized with a single ended
Datasheet



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