MX26 डाटा शीट PDF( Datasheet )

Core Logic 0;[ ® $0,+*  PLFURQ &026 *DWH $UUD Description MX2x is a family of two-to-one digital multiplexers. Logic Symbol Truth Table MX2x S |0 Q |1 S I0 I1 Q LLXL LHXH HXL L HXHH HDL Syntax Ver

www.DataSheet4U.com INDEX MX26C1000A 1M-BIT [128K x 8] CMOS MULTIPLE-TIME-PROGRAMMABLE-EPROM FEATURES • • • • • • • 128K x 8 organization +5V operating power supply +12.75V program/erase volta

www.DataSheet4U.com ADVANCE INFORMATION MX26C1000B FEATURES 1M-BIT [128K x 8] CMOS MULTIPLE-TIME-PROGRAMMABLE-EPROM • • • • • 50 minimum erase/program cycles Chip erase time: 1 (typ.) Chip program

www.DataSheet4U.com ADVANCE INFORMATION MX26C2000B FEATURES 2M-BIT [256K x 8] CMOS MULTIPLE-TIME-PROGRAMMABLE-EPROM • • • • • Chip erase time: 1 (typ.) Chip program time: 12.5 (typ.) 50 minimum era

www.DataSheet4U.com ADVANCE INFORMATION MX26C4000B FEATURES 4M-BIT [512K x 8] CMOS MULTIPLE-TIME-PROGRAMMABLE-EPROM • • • • • Chip erase time: 2s (typ.) Chip program time: 25s (typ.) 100 minimum er

www.DataSheet4U.com INDEX MX26C512A 512K-BIT [64K x 8] CMOS MULTIPLE-TIME-PROGRAMMABLE EPROM FEATURES • • • • • • • 64K x 8 organization +5V operating power supply +12.75V program/erase voltag

MX26L12811MC 128M [x8/x16] SINGLE 3V PAGE MODE MTP MEMORY FEATURES • 3.0V to 3.6V operation voltage • Block Structure - 128 x 128Kbyte Erase Blocks • Fast random / page mode access time - 120/25 ns Read A