M48Z12 डाटा शीट PDF( Datasheet )

M48Z02 M48Z12 5 V, 16 Kbit (2 Kb x 8) ZEROPOWER® SRAM Features ■ Integrated, ultra low power SRAM and powerfail control circuit ■ Unlimited WRITE cycles ■ READ cycle time equals WRITE cycle time ■ Aut

M48Z128 M48Z128Y 5.0 V, 1 Mbit (128 Kbit x 8) ZEROPOWER® SRAM Not recommended for new design Features ■ Integrated, ultra low power SRAM, power-fail control circuit, and battery ■ Conventional SRAM op

M48Z128 M48Z128Y, M48Z128V* 5.0V OR 3.3V, 1 Mbit (128 Kbit x 8) ZEROPOWER® SRAM FEATURES SUMMARY s INTEGRATED, ULTRA LOW POWER SRAM, POWER-FAIL CONTROL CIRCUIT, and BATTERY s Figure 1. 32-pin PMDIP Module CO

M48Z128 M48Z128Y 5.0 V, 1 Mbit (128 Kbit x 8) ZEROPOWER® SRAM Not recommended for new design Features ■ Integrated, ultra low power SRAM, power-fail control circuit, and battery ■ Conventional SRAM op

M48Z129V 3.3 V, 1 Mbit (128 Kb x 8) ZEROPOWER® SRAM Not recommended for new design Features ■ Integrated, ultra low power SRAM, power-fail control circuit, and battery ■ Conventional SRAM operation; u

M48Z129Y M48Z129V 3.3V/5V 1 Mbit (128Kb x8) ZEROPOWER® SRAM s INTEGRATED ULTRA LOW POWER SRAM, POWER-FAIL CONTROL CIRCUIT, and BATTERY AUTOMATIC POWER-FAIL CHIP DESELECT AND WRITE PROTECTION MICROPROCESSOR PO