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IS61NLP51236B DataSheet

No. Partie # Fabricant Description Fiche Technique
1
IS61NLP51236B

ISSI
18Mb STATE BUS SYNCHRONOUS SRAM

• 100 percent bus utilization
• No wait cycles between Read and Write
• Internal self-timed write cycle
• Individual Byte Write Control
• Single R/W (Read/Write) control pin
• Clock controlled, registered address, data and control
• Interleaved or li
Datasheet



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