CY7C264 डाटा शीट PDF( Datasheet )

1 CY7C261 CY7C263/CY7C264 8K x 8 Power-Switched and Reprogrammable PROM Features • CMOS for optimum speed/power • Windowed for reprogrammability • High speed — 20 ns (Commercial) — 25 ns (Military)

CY7C2642KV18/CY7C2644KV18 144-Mbit QDR® II+ SRAM Two-Word Burst Architecture (2.0 Cycle Read Latency) with ODT 144-Mbit QDR® II+ SRAM Two-Word Burst Architecture (2.0 Cycle Read Latency) with ODT Features

CY7C2642KV18/CY7C2644KV18 144-Mbit QDR® II+ SRAM Two-Word Burst Architecture (2.0 Cycle Read Latency) with ODT 144-Mbit QDR® II+ SRAM Two-Word Burst Architecture (2.0 Cycle Read Latency) with ODT Features