AD9525 डाटा शीट PDF( Datasheet )
डेटा पत्रक ( Datasheet PDF ) |
| भाग संख्या | विवरण | मैन्युफैक्चरर्स | |
| AD9525 | Low Jitter Clock Generator Data Sheet
FEATURES
Integrated ultralow noise synthesizer 8 differential 3.6 GHz LVPECL outputs and 1 LVPECL SYNC
output or 2 CMOS SYNC outputs 2 differential reference inputs and 1 single-ended reference
input |
 Analog Devices |
|
| AD9528 | JESD204B/JESD204C Clock Generator | Analog Devices |
|
| AD9525 | Low Jitter Clock Generator | Analog Devices |
|
| AD9520-0 | 12 LVPECL/24 CMOS Output Clock Generator | Analog Devices |
|
| AD9520-1 | 12 LVPECL/24 CMOS Output Clock Generator | Analog Devices |
|
| AD9523 | Jitter Cleaner and Clock Generator | Analog Devices |
|
| AD9523-1 | Low Jitter Clock Generator | Analog Devices |
|
| AD9522-5 | 12 LVDS/24 CMOS Output Clock Generator | Analog Devices |
|
| AD9524 | Jitter Cleaner and Clock Generator | Analog Devices |
|
| AD9522-4 | 12 LVDS/24 CMOS Output Clock Generator | Analog Devices |
|
| AD9520-4 | 12 LVPECL/24 CMOS Output Clock Generator | Analog Devices |
शेयर लिंक :
[1]
www.DataSheet.in | 2017 | संपर्क |