AD9520-5 डाटा शीट PDF( Datasheet )
डेटा पत्रक ( Datasheet PDF ) |
| भाग संख्या | विवरण | मैन्युफैक्चरर्स | |
| AD9520-5 | 12 LVPECL/24 CMOS Output Clock Generator Data Sheet
12 LVPECL/24 CMOS Output Clock Generator AD9520-5
FEATURES
Low phase noise, phase-locked loop (PLL) Optional external 3.3 V/5 V VCO/VCXO to 2.4 GHz 1 differential or 2 single-ended reference inputs |
 Analog Devices |
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| AD9520-0 | 12 LVPECL/24 CMOS Output Clock Generator | Analog Devices |
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| AD9520-1 | 12 LVPECL/24 CMOS Output Clock Generator | Analog Devices |
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| AD9520-4 | 12 LVPECL/24 CMOS Output Clock Generator | Analog Devices |
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| AD9520-3 | 12 LVPECL/24 CMOS Output Clock Generator | Analog Devices |
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| AD9520-2 | 12 LVPECL/24 CMOS Output Clock Generator | Analog Devices |
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| AD9520-5 | 12 LVPECL/24 CMOS Output Clock Generator | Analog Devices |
शेयर लिंक :
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