No. | Partie # | Fabricant | Description | Fiche Technique |
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MOS TECH |
Dual 30 P-Channel Power MOSFET x –5.9 A, –30 V. RDS(ON) = m: @ VGS = –10 V RDS(ON) = m: @ VGS = – 4.5 V x Extended VGSS range ( –25V) for battery applications x ESD protection diode (note 3) x High performance trench technology for extremely low RDS(ON) x High power and curre |
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Tuofeng Semiconductor |
Dual P-Channel MOSFET • –5.3 A, –30 V RDS(ON) = 55 mΩ @ VGS = –10 V RDS(ON) = 85 mΩ @ VGS = –4.5 V • Low gate charge (6nC typical) • Fast switching speed • High performance trench technology for extremely low RDS(ON) • High power and current handling capability DD1D |
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AKM |
24bit Stereo CODEC 1. Recording Function Stereo Single-ended input with three Selectors MIC Amplifier (+29dB/+26dB/+23dB/+20dB/+16dB/+12dB/0dB) Digital ALC (Automatic Level Control) (Setting Ran |
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Semtron |
Dual P-Channel Enhancement Mode MOSFET The SMC4953A is the Dual P-Channel logic enhancement mode power field effect transistor is produced using high cell density. advanced trench technology to provide excellent RDS(ON). This device is suitable for use as a load switch or in PWM and gate |
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NCE Power Semiconductor |
NCE P-Channel Enhancement Mode Power MOSFET ● VDS = -30V,ID = -5.3A RDS(ON) < 100mΩ @ VGS=-4.5V RDS(ON) < 49mΩ @ VGS=-10V D1 G1 G2 D2 S1 S2 Schematic diagram ● High Power and current handing capability ● Lead free product is acquired ● Surface Mount Package Marking and pin Assignment Ap |
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H&M Semiconductor |
Dual P-Channel Enhancement Mode Power MOSFET ● VDS = -30V,ID = -5.1A RDS(ON) < 90mΩ @ VGS=-4.5V RDS(ON) < 60mΩ @ VGS=-10V D1 G1 G2 D2 S1 S2 Schematic diagram HM4953A ● High Power and current handing capability ● Lead free product is acquired ● Surface Mount Package Marking and pin Assign |
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Semtron |
Dual P-Channel Enhancement Mode MOSFET The STP4953A is the Dual P-Channel logic enhancement mode power field effect transistor is produced using high cell density. advanced trench technology to provide excellent RDS(ON). This device is suitable for use as a load switch or in PWM and gate |
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SYNC POWER |
P-Channel MOSFET -30V/-5.2A,RDS(ON)= 70mΩ@VGS=- 10V -30V/-4.2A,RDS(ON)=105mΩ@VGS=-4.5V Super high density cell design for extremely low RDS (ON) Exceptional on-resistance and maximum DC current capability SOP – 8P package design APPLICATIONS z Power Managem |
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BELLING |
P-Channel Enhancement Mode Power MOSFET ● VDS = -30V,ID = -5.3A RDS(ON) < 100mΩ @ VGS=-4.5V RDS(ON) < 49mΩ @ VGS=-10V D1 G1 G2 D2 S1 S2 Schematic diagram ● High Power and current handing capability ● Lead free product is acquired ● Surface Mount Package Marking and pin Assignment Ap |
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Mitsubishi Electric |
(MGF4953A / MGF4954A) SUPER LOW NOISE InGaAs HEMT Low noise figure @ f=12GHz MGF4953A : NFmin. = 0.40dB (Typ.) MGF4954A : NFmin. = 0.60dB (Typ.) High associated gain @ f=12GHz Gs = 13.5dB (Typ.) Fig.1 APPLICATION C to K band low noise amplifiers MITSUBISHI Proprietary Not to be reproduced or disc |
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Mitsubishi Electric |
(MGF4953A / MGF4954A) SUPER LOW NOISE InGaAs HEMT Low noise figure @ f=12GHz MGF4953A : NFmin. = 0.40dB (Typ.) MGF4954A : NFmin. = 0.60dB (Typ.) High associated gain @ f=12GHz Gs = 13.5dB (Typ.) Fig.1 APPLICATION C to K band low noise amplifiers MITSUBISHI Proprietary Not to be reproduced or disc |
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CET |
Dual P-Channel Enhancement Mode Field Effect Transistor -30V, -4.5A, RDS(ON) = 58mΩ @VGS = -10V. RDS(ON) = 85mΩ @VGS = -4.5V. Super high dense cell design for extremely low RDS(ON). High power and current handing capability. Lead free product is acquired. Surface mount Package. D1 8 D1 7 D2 6 D2 5 PRELIM |
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Vishay Siliconix |
Dual P-Channel MOSFET physical interpretation of the device. SUBCIRCUIT MODEL SCHEMATIC This document is intended as a SPICE modeling guideline and does not constitute a commercial product data sheet. Designers should refer to the appropriate data sheet of the same num |
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