ZL30256 डाटा शीट PDF( Datasheet )
डेटा पत्रक ( Datasheet PDF ) |
| भाग संख्या | विवरण | मैन्युफैक्चरर्स | |
| ZL30256 | Jitter Attenuator Block Diagram page 7. Register Map section 9.3
Features
• One, Two or Three DPLL Channels
• Programmable bandwidth, 14Hz to 470Hz
• Freerun or holdover on loss of all inputs
• Hitless reference switchin |
 Microsemi |
|
| ZL30251 | 3-Output Any-to-Any Clock Multiplier and Frequency Synthesizer | Microsemi |
|
| ZL30256 | Jitter Attenuator | Microsemi |
|
| ZL30254 | Clock Multiplier and Jitter Attenuator | Microsemi |
|
| ZL30252 | Multiplier and Jitter Attenuator | Microsemi |
|
| ZL30251 | Clock Multiplier and Frequency Synthesizer |  Microchip |
|
| ZL30250 | Clock Multiplier and Frequency Synthesizer | Microchip |
|
| ZL30255 | Multiplier and Jitter Attenuator | Microsemi |
|
| ZL30253 | Multiplier and Jitter Attenuator | Microsemi |
|
| ZL30250 | 3-Output Any-to-Any Clock Multiplier and Frequency Synthesizer | Microsemi |
शेयर लिंक :
[1]
www.DataSheet.in | 2017 | संपर्क |