SN74LS27 डाटा शीट PDF( Datasheet )

TRIPLE 3-INPUT NOR GATE SN54/74LS27 VCC 14 13 12 11 10 9 8 TRIPLE 3-INPUT NOR GATE LOW POWER SCHOTTKY 1234567 GND GUARANTEED OPERATING RANGES Symbol Parameter VCC Supply Voltage TA Operating Ambient

PACKAGE OPTION ADDENDUM www.ti.com 24-Aug-2018 PACKAGING INFORMATION Orderable Device JM38510/30302B2A Status Package Type Package Pins Package (1) Drawing Qty ACTIVE LCCC FK 20 1 Eco Plan (2) TBD

SN74LS273 Octal D Flip−Flop with Clear The SN74LS273 is a high-speed 8-Bit Register. The register consists of eight D-Type Flip-Flops with a Common Clock and an asynchronous active LOW Master Reset. This dev

OCTAL D FLIP-FLOP WITH CLEAR The SN54 / 74LS273 is a high-speed 8-Bit Register. The register consists of eight D-Type Flip-Flops with a Common Clock and an asynchronous active LOW Master Reset. This device is s

• Contains Eight Flip-Flops With Single-Rail Outputs • Buffered Clock and Direct Clear Inputs • Individual Data Input to Each Flip-Flop • Applications Include: Buffer/Storage Registers Shift Registers P

SN54/74LS279 QUAD SET-RESET LATCH VCC 16 S1 15 R 14 Q 13 S1 12 S2 11 R 10 Q 9 QUAD SET-RESET LATCH LOW POWER SCHOTTKY 1 R 2 S1 3 S2 4 Q 5 R 6 S1 7 Q 8 GND 16 1 J SUFFIX CERAMIC CASE 620-09 TR

SN54279, SN54LS279A, SN74279, SN74LS279A QUADRUPLE S-R LATCHES SDLS093 – DECEMBER 1983 – REVISED MARCH 1988 PRODUCTION DATA information is current as of publication date. Products conform to specifications