No. | Partie # | Fabricant | Description | Fiche Technique |
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Fujitsu |
CMOS 16K-BIT HIGH-SPEED SRAM ax. (Active) 138 mW max. (Standby, TTL level) 83 mW max. (Standby, CMOS level) • Single +5 V power supply ±1 0% tolerance • TTL compatible inputs and outputs • Three-state outputs w~h OR-tie capac~y • Chip select for simplified memory expansion, a |
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Fujitsu Media Devices |
4 X 512 K X 32 BIT SYNCHRONOUS DYNAMIC RAM a fully synchronous operation referenced to a positive edge clock whereby all operations are synchronized at a clock input which enables high performance and simple user interface coexistence. The MB81F643242C SDRAM is designed to reduce the complexi |
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Fujitsu |
4 x 1 M x 16 BIT SYNCHRONOUS DYNAMIC RAM a fully synchronous operation referenced to a positive edge clock whereby all operations are synchronized at a clock input which enables high performance and simple user interface coexistence. The MB81F641642C SDRAM is designed to reduce the complexi |
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Fujitsu |
MOS DRAM |
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Fujitsu |
CMOS 16K-BIT HIGH-SPEED SRAM uts • Three-state outputs w~h OR-tie capacity • Chip select for simplified memory expansion • Electrostatic protection for all inputs and outputs • Standard 20-pin Plastic Package: DIP MB81 C69A-xxP • Standard 20-pad Ceramic Package: LCC MB81C69A |
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ETC |
MB814400 |
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Fujitsu |
4 x 1 M x 16 BIT SYNCHRONOUS DYNAMIC RAM a fully synchronous operation referenced to a positive edge clock whereby all operations are synchronized at a clock input which enables high performance and simple user interface coexistence. The MB81F641642C SDRAM is designed to reduce the complexi |
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Fujitsu |
CMOS 72K-BIT HIGH-SPEED SRAM 5 ns max. A11, A12 aocesstime -15 ns max. {MB81C79B-45) • Low power consumption: 550 mW max. (Operation) 138 mW max. (TTL Standby) 83 mW max. (CMOS Standby) • Single +5 V power supply ±1 0% tolerance • TTL compatible inputs and outputs • Three-st |
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Fujitsu |
MB8117405B |
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Fujitsu Media Devices |
256K x 4-Bit Fast Page Mode Low Power DRAM |
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Fujitsu Microelectronics |
4 x 1M x 16-Bit SDRAM a fully synchronous operation referenced to a positive edge clock whereby all operations are synchronized at a clock input which enables high performance and simple user interface coexistence. The MB81F641642D SDRAM is designed to reduce the complexi |
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Fujitsu |
262144 Bit Dual Port Dynamic RAM |
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Fujitsu |
NMOS 262144 Bit DRAM |
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Fujitsu |
CMOS 1M x 1 Bit Fast page Mode Dynamic RAM |
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Fujitsu |
MOS 262144 Bit DRAM |
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Fujitsu |
MOS 262144 Bit DRAM |
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Fujitsu |
MOS DRAM |
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Fujitsu |
MOS DRAM |
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Fujitsu |
(MB81256-10/-12/-15) NMOS 262144 Bit DRAM |
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Fujitsu |
NMOS 65536 Bit DRAM |
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