IS61QDPB44M18 डाटा शीट PDF( Datasheet )

72 Mb (2M x 36 & 4M x 18) 7 QUADP (Burst. of 4) Synchronous SRAMs IQ May 2009 Features • 2M x 36 or 4M x 18. • On-chip delay-locked loop (DLL) for wide data valid window. • Separate read and write ports

IS61QDPB44M18A/A1/A2 IS61QDPB42M36A/A1/A2 4Mx18, 2Mx36 72Mb QUADP (Burst 4) SYNCHRONOUS SRAM (2.5 Cycle Read Latency) NOVEMBER 2014 FEATURES  2Mx36 and 4Mx18 configuration available.  On-chip Delay Lock

IS61QDPB44M18A/A1/A2 IS61QDPB42M36A/A1/A2 4Mx18, 2Mx36 72Mb QUADP (Burst 4) SYNCHRONOUS SRAM (2.5 Cycle Read Latency) NOVEMBER 2014 FEATURES  2Mx36 and 4Mx18 configuration available.  On-chip Delay Lock

IS61QDPB44M18A/A1/A2 IS61QDPB42M36A/A1/A2 4Mx18, 2Mx36 72Mb QUADP (Burst 4) SYNCHRONOUS SRAM (2.5 Cycle Read Latency) NOVEMBER 2014 FEATURES  2Mx36 and 4Mx18 configuration available.  On-chip Delay Lock

IS61QDPB44M18B/B1/B2 IS61QDPB42M36B/B1/B2 4Mx18, 2Mx36 72Mb QUADP (Burst 4) SYNCHRONOUS SRAM (2.5 Cycle Read Latency) DECEMBER 2015 FEATURES  2Mx36 and 4Mx18 configuration available.  On-chip Delay Lock

IS61QDPB44M18B/B1/B2 IS61QDPB42M36B/B1/B2 4Mx18, 2Mx36 72Mb QUADP (Burst 4) SYNCHRONOUS SRAM (2.5 Cycle Read Latency) DECEMBER 2015 FEATURES  2Mx36 and 4Mx18 configuration available.  On-chip Delay Lock

IS61QDPB44M18B/B1/B2 IS61QDPB42M36B/B1/B2 4Mx18, 2Mx36 72Mb QUADP (Burst 4) SYNCHRONOUS SRAM (2.5 Cycle Read Latency) DECEMBER 2015 FEATURES  2Mx36 and 4Mx18 configuration available.  On-chip Delay Lock