CY7C142 डाटा शीट PDF( Datasheet )

CY7C132, CY7C136 CY7C136A, CY7C142, CY7C146 2K x 8 Dual-Port Static RAM Features ■ True dual-ported memory cells that enable simultaneous reads of the same memory location ■ 2K x 8 organization ■ 0.65 mi

www.DataSheet4U.com PRELIMINARY CY7C1416AV18 CY7C1427AV18 CY7C1418AV18 CY7C1420AV18 36-Mbit DDR-II SRAM 2-Word Burst Architecture Features • 36-Mbit density (4M x 8, 4M x 9, 2M x 18, 1M x 36) • 250-MHz c

www.DataSheet4U.com CY7C1416BV18, CY7C1427BV18 CY7C1418BV18, CY7C1420BV18 36-Mbit DDR-II SRAM 2-Word Burst Architecture Features ■ ■ ■ ■ ■ Functional Description The CY7C1416BV18, CY7C1427BV18, CY7

www.DataSheet4U.com CY7C1416JV18, CY7C1427JV18 CY7C1418JV18, CY7C1420JV18 36-Mbit DDR-II SRAM 2-Word Burst Architecture Features ■ ■ ■ ■ ■ Functional Description The CY7C1416JV18, CY7C1427JV18, CY7

CY7C1418KV18/CY7C1420KV18 36-Mbit DDR II SRAM Two-Word Burst Architecture 36-Mbit DDR II SRAM Two-Word Burst Architecture Features ■ 36-Mbit density (2M × 18, 1M × 36) ■ 333 MHz clock for high bandwidth

CY7C1417AV18 CY7C1428AV18 CY7C1419AV18 CY7C1421AV18 36-Mbit DDR-II SRAM 4-Word Burst Architecture Features • 36-Mbit density (4M x 8, 4M x 9, 2M x 18, 1M x 36) • 300-MHz clock for high bandwidth • 4-Wor

CY7C1422AV18 CY7C1429AV18 CY7C1423AV18 CY7C1424AV18 36-Mbit DDR-II SIO SRAM 2-Word Burst Architecture Features • 36-Mbit density (4M x 8, 4M x 9, 2M x 18, 1M x 36) • 300-MHz clock for high bandwidth • 2-