| No. | Partie # | Fabricant | Description | Fiche Technique |
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Cypress Semiconductor |
5V/ 3.3V/ ISR High-Performance CPLDs • In-System Reprogrammable™ (ISR™) CMOS CPLDs — JTAG interface for reconfigurability — Design changes do not cause pinout changes — Design changes do not cause timing changes • High density — 32 to 512 macrocells — 32 to 264 I/O pins — Five dedicated |
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