74HC138 डाटा शीट PDF( Datasheet )

74HC138; 74HCT138 3-to-8 line decoder/demultiplexer; inverting Rev. 9 — 13 August 2021 Product data sheet 1. General description The 74HC138; 74HCT138 decodes three binary weighted address inputs (A0, A1 an

SN54HC138, SN74HC138 SCLS107G – DECEMBER 1982 – REVISED OCTOBER 2021 SNx4HC138 3-Line To 8-Line Decoders/Demultiplexers 1 Features • Targeted Specifically for High-Speed Memory Decoders and Data-Transmis

74HC138; 74HCT138 3-to-8 line decoder/demultiplexer; inverting Rev. 6 — 28 December 2015 Product data sheet 1. General description The 74HC138; 74HCT138 decodes three binary weighted address inputs (A0, A1

74HC138 3 TO 8 LINE DECODER DEMULTIPLEXER Description The 74HC138 is a high speed CMOS device. The device accepts a three bit binary weighted address on input pins A0, A1 and A2 and when enabled will produce o

74HC138-Q100; 74HCT138-Q100 3-to-8 line decoder/demultiplexer; inverting Rev. 5 — 13 August 2021 Product data sheet 1. General description The 74HC138-Q100; 74HCT138-Q100 decodes three binary weighted add

MOTOROLA SEMICONDUCTOR TECHNICAL DATA 1-of-8 Decoder/Demultiplexer High–Performance Silicon–Gate CMOS The MC54/74HC138A is identical in pinout to the LS138. The device inputs are compatible with standard

CMOS Digital Integrated Circuits Silicon Monolithic 74HC138D 74HC138D 1. Functional Description • 3-to-8 Line Decoder 2. General The 74HC138D is a high speed CMOS 3-to-8 DECODER fabricated with silicon gate