डेटा पत्रक ( Datasheet PDF ) |
भाग संख्या | विवरण | मैन्युफैक्चरर्स | |
74F10 | Triple 3-input NAND gate INTEGRATED CIRCUITS
74F10 Triple 3-input NAND gate 74F11 Triple 3-input AND gate
Product specification IC15 Data Handbook 1989 Sep 20
Philips Semiconductors
Philips Semiconductors
Product specification
Gat |
NXP |
|
74F10 | Triple 3-Input NAND Gate 74F10 Triple 3-Input NAND Gate
April 1988 Revised July 1999
74F10 Triple 3-Input NAND Gate
General Description
This device contains three independent gates, each of which performs the logic NAND function.
Or |
Fairchild Semiconductor |
|
74F10 | Triple 3-Input NAND Gate 54F 74F10 Triple 3-Input NAND Gate
December 1994
54F 74F10 Triple 3-Input NAND Gate
General Description
This device contains three independent gates each of which performs the logic NAND function
Commercial |
National Semiconductor |
|
74F10 | TRIPLE 3-INPUT POSITIVE-NAND GATE • Package Options Include Plastic
Small-Outline Packages, Ceramic Chip Carriers, and Standard Plastic and Ceramic 300-mil DIPs
description
These devices contain three independent 3-input NAND gates. They perf |
etcTI |
|
74F1056 | 8-Bit Schottky Barrier Diode Array 74F1056 8-Bit Schottky Barrier Diode Array
December 1993 Revised August 1999
74F1056 8-Bit Schottky Barrier Diode Array
General Description
The 74F1056 is an 8-bit Schottky barrier diode array designed to be |
Fairchild Semiconductor |
|
74F1071 | 18-Bit Undershoot/Overshoot Clamp 74F1071 18-Bit Undershoot/Overshoot Clamp
October 1994 Revised August 1999
74F1071 18-Bit Undershoot/Overshoot Clamp and ESD Protection Device
General Description
The 74F1071 is an 18-bit undershoot/overshoot |
Fairchild Semiconductor |
|
74F109 | Dual JK Positive Edge-Triggered Flip-Flop 54F/74F109
54F/74F109 Dual JK Positive Edge-Triggered Flip-Flop
November 1994
54F/74F109 Dual JK Positive Edge-Triggered Flip-Flop
General Description
The ’F109 consists of two high-speed, completely indep |
National Semiconductor |
www.DataSheet.in | 2017 | संपर्क |