डेटा पत्रक ( Datasheet PDF ) |
भाग संख्या | विवरण | मैन्युफैक्चरर्स | |
74AUP1G09 | Low-power 2-input AND Gate www.DataSheet4U.com
74AUP1G09
Low-power 2-input AND gate with open-drain
Rev. 01 — 15 January 2009 Product data sheet
1. General description
The 74AUP1G09 provides the single 2-input AND gate with an open-d |
NXP |
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74AUP1G09 | SINGLE 2 INPUT POSITIVE AND GATE 74AUP1G09
SINGLE 2 INPUT POSITIVE AND GATE WITH OPEN DRAIN OUTPUT
Description
The Advanced, Ultra Low Power (AUP) CMOS logic family is designed for low power and extended battery life in portable applications. |
Diodes |
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74AUP1G09 | Low-power 2-input AND gate 74AUP1G09
Low-power 2-input AND gate with open-drain
Rev. 7 — 14 January 2022
Product data sheet
1. General description
The 74AUP1G09 is a single 2-input AND gate with open-drain output. Schmitt-trigger a |
nexperia |
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74AUP1G09-Q100 | Low-power 2-input AND gate 74AUP1G09-Q100
Low-power 2-input AND gate with open-drain
Rev. 3 — 14 January 2022
Product data sheet
1. General description
The 74AUP1G09-Q100 is a single 2-input AND gate with open-drain output. Schmitt |
nexperia |
www.DataSheet.in | 2017 | संपर्क |