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ILE4267 डेटा पत्रक PDF( Datasheet डाउनलोड )


डेटा पत्रक - 5V Low-Drop Voltage Regulator - IK Semiconductor

भाग संख्या ILE4267
समारोह 5V Low-Drop Voltage Regulator
मैन्युफैक्चरर्स IK Semiconductor 
लोगो IK Semiconductor लोगो 
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ILE4267 pdf
ILE4267
Circuit Description
The control amplifier compares a reference voltage, which is kept highly accurate by
resistance adjustment, to a voltage that is proportional to the output voltage and drives the
base of the series transistor via a buffer. Saturation control as a function of the load
current prevents any over-saturating of the power element.
A comparator in the reset-generator block compares a reference that is independent of the
input voltage to the scaled-down output voltage. If this reaches a value of 4.5 V, the reset-
delay capacitor is discharged and then the reset output is set Low. As the output voltage
increases again, the reset-delay capacitor is charged with constant current from VQ = 4.5
V onwards. When the capacitor voltage reaches the upper switching threshold, reset goes
High again. The reset delay can be set within wide range by selection of the external
capacitor. With the integrated tum-ON/tum-OFF logic it is simple to implement delayed
tum-OFF without external components.
Truth Table for Turn-ON/Turn-OFF Logic
E2, Inhibit
L
H
H
X
L
Hold
X
X
L
L
L
LH
VQ
OFF
ON
ON
ON
ON
OFF
Remarks
Initial state. Inhibit internally pulled up
Regulator switched on via Inhibit, by ignition for example
Hold clamped active to ground by controller while Inhibit is still high
Previous state remains, even ignition is shut off: self-holding state
Ignition shut off while regulator is in self-holding state
Regulator shut down by releasing of Hold while Inhibit remains Low, final
state. No active clamping required by external self-holding circuit (µC)
to keep regulator shut off.
Inhibit: E2 Enable function, active High
Hold: E6 Hold and release function, active Low
Pin Definitions and Functions
Pin Symbol
Function
1 I Input; block to ground directly at the IC by a ceramic capacitor
2
E2
Inhibit; device is turned-ON by High signal on this pin; internal pulldown resistor of 100
k
3
R
Reset Output; open-collector output internally connected to the output via a resistor of
30 k
4 GND Ground; connected to rear of chip
5 D Reset Delay; connect with capacitor to GND for setting delay
6
E6
Hold; see truth table above for function; this input is connected to output voltage across
puliup resistor of 50 k
7 Q 5-V Output; block to GND with 22-µF capacitor, ESR < 3
2

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