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PL671-00 डेटा पत्रक PDF( Datasheet डाउनलोड )


डेटा पत्रक - Programmable Spread Spectrum Clock - PLL

भाग संख्या PL671-00
समारोह Programmable Spread Spectrum Clock
मैन्युफैक्चरर्स PLL 
लोगो PLL लोगो 
पूर्व दर्शन
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PL671-00 pdf
PicoEMITM Programmable Spread Spectrum Clock
PAD ASSIGNMENT AND DESCRIPTION
Name
Pad Assignment*
Type
Pad # X (µm) Y (µm)
Description
XIN 1
OE, PDB,
CLK1
2
124 1286 I Crystal input pad.
This pin can be programmed to function as OE (input), PDB (input)
or CLK1 (output).
Output Enable (OE) input. Enables and disables the clock output
buffer. Internal pull up resistor.
Power Down (PDB) input. Turns off the oscillator, PLL and the
output when pulled to logic “0”. Internal pull up resistor.
87 930 I/O
Pin State
OE
PDB
0 Disable CLK Power Down Mode
1 (default)
Normal mode
Normal mode
CSEL1
3
Clock1 (CLK1) output. This optional clock can be set to FREF,
FREF/2 or FOUT (Programmable PLL output).
Optional programming of CSEL0 & CSEL1 input pins allow
87 628 I switching between ‘4’ pre-defined configurations. Internal pull up
resistor.
GND 4 87 275 P GND connection
CLK0
5 714 380 O Programmable Clock Output
This pin can be programmed to function as CSEL0 (input) or CLK2
(output).
CSEL0,
CLK2
6
714 677
CSEL0 input. Optional programming of CSEL0 & CSEL1 input
I pins allow switching between ‘4’ pre-defined configurations.
Internal pull up resistor.
CLK2 output. This optional clock can be set to FREF, CLK0,
CLK0/2 or CLK0/4.
VDD
7
714 916
P VDD connection
XOUT 8 677 1286 O Crystal output pad. See Crystal Specifications on page 6.
* Note: The X/Y coordinates indicate pad centers referenced from the lower left corner of the die.
47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 www.phaselink.com Rev 12/22/08 Page 2

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अनुशंसा डेटापत्रक

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