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RTL8180L डेटा पत्रक PDF( Datasheet डाउनलोड )


डेटा पत्रक - WIRELESS LAN NETWORK INTERFACE CONTROLLER - Realtek

भाग संख्या RTL8180L
समारोह WIRELESS LAN NETWORK INTERFACE CONTROLLER
मैन्युफैक्चरर्स Realtek 
लोगो Realtek लोगो 
पूर्व दर्शन
1 Page
		
<?=RTL8180L?> डेटा पत्रक पीडीएफ

RTL8180L pdf
1. Features
RTL8180L
l 128-Pin LQFP
l Supports descriptor-based buffer management
l Patented integrated Wireless LAN MAC and Direct
Sequence Spread Spectrum Baseband Processor in one chip
l Enhanced Signal Detector
l Processing Gain FCC compliance
l On-Chip A/D and D/A converters for I/Q Data, AGC, and
Adaptive Power Control
l Targeted for Multipath Delay Spreads 125ns at 11Mbps
l Supports Antenna Diversity
l 1 Mbps, 2 Mbps, 5.5 Mbps, and 11 Mbps operation
l PCI local bus network interface controller
² Compliant to PCI Revision 2.2
² Supports PCI clock 16.75MHz-40MHz
² Supports PCI target fast back-to-back transaction
² Supports Memory Read Line, Memory Read
Multiple, Memory Write and Invalidate
² Provides PCI bus master data transfers and PCI
memory space or I/O space mapped data transfers
of RTL8180's operational registers
² Supports PCI VPD (Vital Product Data)
² Supports ACPI, PCI power management
l Supports CardBus. The CIS can be stored in a 93C56.
l Supports 44MHz OSC as the internal clock source. The
frequency deviation of OSC must be within 25 PPM.
l Compliant to PC97, PC98, PC99 and PC2001 standards
l Supports Wake-On-LAN (WOL) function and remote
wake-up (Magic Packet* and Microsoft® wake-up frame)
l Supports 4 WOL signals (active high, active low,
positive pulse, and negative pulse)
l Supports auxiliary power-on internal reset, to be ready
for remote wake-up when main power remains off
l Supports auxiliary power auto-detect, and sets the
related capability of power management registers in PCI
configuration space
l Compliant to IEEE 802.11 and IEEE 802.11b standards
l Supports Short Preamble option
l Internal encryption/decryption engine executes IEEE
802.11 40 bits and 104 bits WEP
l Supports 11Mbps rates with automatic fallback to 5.5, 2,
and 1Mbps
l Includes a programmable, PCI burst size and early Rx
threshold
l Supports a 32-bit general-purpose timer with the
external PCI clock as clock source, to generate
timer-interrupt
l Contains two large independent transmit and receive
FIFO devices
l Advanced power saving mode when LAN function or
wakeup function is not used
l Uses 93C46 (64*16-bit EEPROM) or 93C56
(128*16-bit EEPROM) to store resource configuration,
ID parameter, and VPD data. The 93C56 can also be
used to store the CIS data structure for CardBus
applications.
l Supports LED pins for various network activity
indications
l Supports 1 general purpose input pin and up to 3 general
purpose output pins.
l Supports digital loopback capability on both ports
l Universal Chip for various Radio Front End for different
applications
l Supports software control on 3-wire bus on RF chipset.
l 3.3V and 1.8V power supplies needed
l 5V tolerant I/Os
l 0.18μ CMOS process
2003/3/31
2
Rev1.2

विन्यास 30 पेज
डाउनलोड[ RTL8180L Datasheet.PDF ]


शेयर लिंक


अनुशंसा डेटापत्रक

भाग संख्याविवरणविनिर्माण
RTL8180LWIRELESS LAN NETWORK INTERFACE CONTROLLERRealtek
Realtek


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