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A3V28S40JTP डेटा पत्रक PDF( Datasheet डाउनलोड )


डेटा पत्रक - 128M Single Data Rate Synchronous DRAM - Zentel

भाग संख्या A3V28S40JTP
समारोह 128M Single Data Rate Synchronous DRAM
मैन्युफैक्चरर्स Zentel 
लोगो Zentel लोगो 
पूर्व दर्शन
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A3V28S40JTP pdf
A3V28S40JTP
128M Single Data Rate Synchronous DRAM
General Description
A3V28S40JTP is organized as 4-bank x 2,097,154-word x 16-bit Synchronous DRAM with LVTTL interface. All inputs and
outputs are referenced to the rising edge of CLK. A3V28S40JTP achieve very high speed data rates up to 166MHz, and are
suitable for main memories or graphic memories in computer systems.
Features
- Single 3.3V ±0.3V power supply
- Maximum clock frequency :
- 60:166MHz<3-3-3>/-70:143MHz<3-3-3>/-75:133MHz<3-3-3>
- Fully synchronous operation referenced to clock rising edge
- 4-bank operation controlled by BA0, BA1 (Bank Address)
- /CAS latency- 2/3 (programmable)
- Burst length- 1/2/4/8/FP (programmable)
- Burst type- Sequential and interleave burst (programmable)
- Byte Control- LDQM and UDQM (A3V28S40JTP)
- Random column access
- Auto precharge / All bank precharge controlled by A10
- Support concurrent auto-precharge
- Auto and self refresh
- 4096 refresh cycles /64ms
- LVTTL Interface
- Package
400-mil, 54-pin Thin Small Outline (TSOP II) with 0.8mm lead pitch
Pb-free package is available
Ordering Information
54Pin TSOPII (400mil x 875mil)
Part No.
Max. Frequency
A3V28S40JTP-60 166MHz (CL=3)
A3V28S40JTP-70 143MHz (CL=3)
A3V28S40JTP-75 133MHz (CL=3)
Supply Voltage
3.3V
3.3V
3.3V
Zentel Electronics reserves the right to change products or specification without notice.
Revision 1.0
Page 1/39
Oct., 2013

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डाउनलोड[ A3V28S40JTP Datasheet.PDF ]


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अनुशंसा डेटापत्रक

भाग संख्याविवरणविनिर्माण
A3V28S40JTP128M Single Data Rate Synchronous DRAMZentel
Zentel


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