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BL6523B डेटा पत्रक PDF( Datasheet डाउनलोड )


डेटा पत्रक - Single Phase Multifunction Energy Metering IC - BELLING

भाग संख्या BL6523B
समारोह Single Phase Multifunction Energy Metering IC
मैन्युफैक्चरर्स BELLING 
लोगो BELLING लोगो 
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BL6523B pdf
BL6523B Single Phase, Multifunction Energy meter IC
Pin Symbol
DESCRIPTIONS
1 AVDD Power Supply (+5V). Provides the supply voltage for the circuitry. It
should be maintained at 5 V±5% for specified operation.
23IAPIANAnalog input for current channel, These inputs are fully differential
45 IBPIBN voltage inputs with a maximum signal level of ±660 mV, Adjustable
Gain.
67
VPVN
Negative and Positive Inputs for Voltage Channel. These inputs provide a
fully differential input pair. The maximum differential input voltage is ±
750 mV for specified operation.Adjustable Gain.
8 VREF On-Chip Voltage Reference. The on-chip reference has a nominal value of
2.5V ± 8% and a typical temperature coefficient of 30ppm/. An
external reference source may also be connected at this pin.
9 AGND Ground Reference. Provides the ground reference for the circuitry.
10 DGND Digital Ground
1112AT0AT1Programmable digital output. See AT_SEL register section. Default
1314 AT2AT3 output:AT0=FAULTAT1=REVPAT2=ZXAT3=nSAG
15 /IRQ Interrupt output.
16 CLKIN Clock In. An external clock can be provided at this logic input,
Alterrnatively, a crystal (3.58MHz) can be connected across this pin and
pin17 to provide a clock source.
17 CLKOUT Clock out. A crystal can be connected across this pin and Pin16 as
described above to provide a clock source.
18 /CS Chip select for SPI interface. This pin must be pulled low if using the
SPIinterface.
19 SCLK Serial clock input for the synchronous serial interface. All serial
communication data are synchronized to the clock.
20 DOUT Data output for SPI interface. Data is shifted out at this pin on the rising
edge of SCLK. This output is normally in a high impedance state, unless
it is driving data out to the serial data bus.
21 DIN Data input for SPI interface. Data is shifted in at this pin on the rising
edge of SCLK
22 CF Calibration Frequency. The CF logic output gives instantaneous real
power information. This output is intended to use for calibration purposes.
The full-scale output frequency can be scaled by the value of WA_CFDIV
register. When the power is low, the pulse width is equal to 90ms. When
the power is high and the output period less than 180ms, the pulse width
equals to half of the output period.
23
/RST
Reset Pin. Logic low on this pin will hold the ADCS and digital circuitry
in a reset condition and clear internal registers.
24 DVDD DiDigital Power Supply+5V,provides the supply voltage for the digital
circuitry. It should be maintained at +4.75V~+5.25V for specified
operation
2/30 v1.0

विन्यास 30 पेज
डाउनलोड[ BL6523B Datasheet.PDF ]


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