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FW801A डेटा पत्रक PDF( Datasheet डाउनलोड )


डेटा पत्रक - One-Cable Transceiver/Arbiter Device - Agere Systems

भाग संख्या FW801A
समारोह One-Cable Transceiver/Arbiter Device
मैन्युफैक्चरर्स Agere Systems 
लोगो Agere Systems लोगो 
पूर्व दर्शन
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<?=FW801A?> डेटा पत्रक पीडीएफ

FW801A pdf
FW801A Low-Power PHY IEEE 1394A-2000
One-Cable Transceiver/Arbiter Device
Data Sheet, Rev. 1
June 2001
Table of Contents
Contents
Page
Distinguishing Features ............................................................................................................................................ 1
Features ................................................................................................................................................................... 1
Other Features ......................................................................................................................................................... 1
Description ................................................................................................................................................................ 3
Signal Information ..................................................................................................................................................... 6
Application Information ...........................................................................................................................................10
Crystal Selection Considerations ............................................................................................................................11
1394 Application Support Contact Information .......................................................................................................12
Absolute Maximum Ratings ....................................................................................................................................12
Electrical Characteristics ........................................................................................................................................13
Timing Characteristics ............................................................................................................................................16
Timing Waveforms ..................................................................................................................................................17
Internal Register Configuration ...............................................................................................................................18
Outline Diagrams ....................................................................................................................................................23
Ordering Information ...............................................................................................................................................23
List of Figures
Figures
Page
Figure 1. Block Diagram ........................................................................................................................................... 5
Figure 2. Pin Assignments ........................................................................................................................................ 6
Figure 3. Typical External Component Connections ..............................................................................................10
Figure 4. Typical Port Termination Network ...........................................................................................................11
Figure 5. Dn, CTLn, and LREQ Input Setup and Hold Times Waveforms .............................................................17
Figure 6. Dn, CTLn Output Delay Relative to SYSCLK Waveforms .......................................................................17
List of Tables
Tables
Page
Table 1. Signal Descriptions ..................................................................................................................................... 7
Table 2. Absolute Maximum Ratings ......................................................................................................................12
Table 3. Analog Characteristics ..............................................................................................................................13
Table 4. Driver Characteristics ...............................................................................................................................14
Table 5. Device Characteristics ..............................................................................................................................15
Table 6. Switching Characteristics .........................................................................................................................16
Table 7. Clock Characteristics ................................................................................................................................16
Table 8. PHY Register Map for the Cable Environment ........................................................................................18
Table 9. PHY Register Fields for the Cable Environment ......................................................................................18
Table 10. PHY Register Page 0: Port Status Page ................................................................................................20
Table 11. PHY Register Port Status Page Fields ...................................................................................................21
Table 12. PHY Register Page 1: Vendor Identification Page .................................................................................22
Table 13. PHY Register Vendor Identification Page Fields ....................................................................................22
2 Agere Systems Inc.

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भाग संख्याविवरणविनिर्माण
FW801One-Cable Transceiver/Arbiter DeviceAgere Systems
Agere Systems
FW801AOne-Cable Transceiver/Arbiter DeviceAgere Systems
Agere Systems


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