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ispPAC-POWR1014 डेटा पत्रक PDF( Datasheet डाउनलोड )


डेटा पत्रक - In-System Programmable Power Supply Supervisor / Reset Generator and Sequencing Controller - Lattice Semiconductor

भाग संख्या ispPAC-POWR1014
समारोह In-System Programmable Power Supply Supervisor / Reset Generator and Sequencing Controller
मैन्युफैक्चरर्स Lattice Semiconductor 
लोगो Lattice Semiconductor लोगो 
पूर्व दर्शन
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ispPAC-POWR1014 pdf
ispPAC-POWR1014/A Data Sheet
MOSFET drivers. In high-voltage mode these outputs can provide up to 12 V for driving the gates of n-channel
MOSFETs so that they can be used as high-side power switches controlling the supplies with a programmable
ramp rate for both ramp up and ramp down.
The ispPAC-POWR1014/A incorporates a 24-macrocell CPLD that can be used to implement complex state
machine sequencing for the control of multiple power supplies as well as combinatorial logic functions. The status
of all of the comparators on the analog input channels as well as the general purpose digital inputs are used as
inputs by the CPLD array, and all digital outputs may be controlled by the CPLD. Four independently programmable
timers can create delays and time-outs ranging from 32 µs to 2 seconds. The CPLD is programmed using Logi-
Builder™, an easy-to-learn language integrated into the PAC-Designer® software. Control sequences are written to
monitor the status of any of the analog input channel comparators or the digital inputs.
The on-chip 10-bit A/D converter is used to monitor the VMON voltage through the I2C bus or JTAG interface of the
ispPAC-POWR1014A device.
The I2C bus/SMBus interface allows an external microcontroller to measure the voltages connected to the VMON
inputs, read back the status of each of the VMON comparator and PLD outputs, control logic signals IN2 to IN4 and
control the output pins (ispPAC-POWR1014A only). The JTAG interface can be used to read out all I2C registers
during manufacturing.
Figure 1. ispPAC-POWR1014/A Block Diagram
VMON1
VMON2
VMON3
VMON4
VMON5
VMON6
VMON7
VMON8
VMON9
VMON10
IN1
IN2
IN3
IN4
ADC*
MEASUREMENT
CONTROL LOGIC*
CPLD
24 MACROCELLS
53 INPUTS
JTAG LOGIC
CLOCK
OSCILLATOR
TIMERS
(4)
I2C
INTERFACE
HVOUT1
HVOUT2
OUT3/(SMBA*)
OUT4
OUT5
OUT6
OUT7
OUT8
OUT9
OUT10
OUT11
OUT12
OUT13
OUT14
*ispPAC-POWR1014A only.
2

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अनुशंसा डेटापत्रक

भाग संख्याविवरणविनिर्माण
ispPAC-POWR1014In-System Programmable Power Supply Supervisor / Reset Generator and Sequencing ControllerLattice Semiconductor
Lattice Semiconductor
ispPAC-POWR1014AIn-System Programmable Power Supply Supervisor / Reset Generator and Sequencing ControllerLattice Semiconductor
Lattice Semiconductor


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