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STMIPID02 डेटा पत्रक PDF( Datasheet डाउनलोड )


डेटा पत्रक - Dual mode MIPI CSI-2 / SMIA CCP2 de-serializer - STMicroelectronics

भाग संख्या STMIPID02
समारोह Dual mode MIPI CSI-2 / SMIA CCP2 de-serializer
मैन्युफैक्चरर्स STMicroelectronics 
लोगो STMicroelectronics लोगो 
पूर्व दर्शन
1 Page
		
<?=STMIPID02?> डेटा पत्रक पीडीएफ

STMIPID02 pdf
Block diagrams
1 Block diagrams
STMIPID02
Figure 1. Block diagram
Doubles
as CCP2
data &
clock/strobe
inputs
Data Lane 2
80-800Mbps
DATA1P2
DATA1N2
Clock Lane 2
40-400MHz
CLKP2
CLKN2
Data Lane 1.2
80-800Mbps
DATA2P1
DATA2N1
Doubles
as CCP2
data &
clock/strobe
inputs
Data Lane 1.1
80-800Mbps
DATA1P1
DATA1N1
Clock Lane 1
40-400MHz
CLKP1
CLKN1
Slave data lane module
Data lane
control
interface
logic
Slave clock lane module
Clock lane
control
interface
logic
MIPI D-PHY RX
Slave data lane module
Data lane
control
interface
logic
Slave data lane module
Data lane
control
interface
logic
Slave clock lane module
Clock lane
control
interface
logic
MIPI CSI-2 RX
Protocol
STMIPID02
SMIA CCP2 RX
Clock recovery &
de-serializer
XSDN
1.2V voltage
regulator (LDO)
Power
on
reset
JTAG
controller
Clock
manager
400kHz
I2C
slave
VDDOUT_LDO
1V8
ERROR
INT
1V8 12-bit parallel
interface @ 200MHz
D[11:0]
VSYNC
HSYNC
PCLK (up to 200MHz)
EXTCLK
6.0MHz - 27MHz
SDA
SCL
2/52 Draft Rev 0.7

विन्यास 30 पेज
डाउनलोड[ STMIPID02 Datasheet.PDF ]


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