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FDMA507PZ डेटा पत्रक PDF( Datasheet डाउनलोड )


डेटा पत्रक - Single P-Channel PowerTrench MOSFET - Fairchild Semiconductor

भाग संख्या FDMA507PZ
समारोह Single P-Channel PowerTrench MOSFET
मैन्युफैक्चरर्स Fairchild Semiconductor 
लोगो Fairchild Semiconductor लोगो 
पूर्व दर्शन
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<?=FDMA507PZ?> डेटा पत्रक पीडीएफ

FDMA507PZ pdf
Electrical Characteristics TJ = 25 °C unless otherwise noted
Symbol
Parameter
Test Conditions
Min Typ Max Units
Off Characteristics
BVDSS
BVDSS
TJ
IDSS
IGSS
Drain to Source Breakdown Voltage
Breakdown Voltage Temperature
Coefficient
Zero Gate Voltage Drain Current
Gate to Source Leakage Current
ID = -250 µA, VGS = 0 V
-20
V
ID = -250 µA, referenced to 25 °C
-12 mVC
VDS = -16 V, VGS = 0 V
VGS = ±8 V, VDS = 0 V
-1 µA
±10 µA
On Characteristics
VGS(th)
VGS(th)
TJ
Gate to Source Threshold Voltage
Gate to Source Threshold Voltage
Temperature Coefficient
rDS(on)
Drain to Source On Resistance
gFS Forward Transconductance
VGS = VDS, ID = -250 µA
-0.4 -0.5 -1.5
V
ID = -250 µA, referenced to 25 °C
3 mV/°C
VGS = -5 V, ID = -7.8 A
VGS = -4.5 V, ID = -7 A
VGS = -2.5 V, ID = -5.5 A
VGS = -1.8 V, ID = -4 A
VGS = -5 V, ID = -7.8 A, TJ = 125 °C
VDS = -5 V, ID = -7.8 A
19 24
20 25
24 35 m
29 45
26 34
33 S
Dynamic Characteristics
Ciss
Coss
Crss
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
VDS = -10 V, VGS = 0 V,
f = 1 MHz
1515
265
240
2015
355
360
pF
pF
pF
Switching Characteristics
td(on)
tr
td(off)
tf
Qg(TOT)
Qgs
Qgd
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Total Gate Charge
Gate to Source Gate Charge
Gate to Drain “Miller” Charge
VDD = -10 V, ID = -7.8 A
VGS = -5 V, RGEN = 6
VDD = -10 V, ID = -7.8 A
VGS = -5 V
6.4 13
14 25
192 307
96 154
30 42
2
7.5
ns
ns
ns
ns
nC
nC
nC
Drain-Source Diode Characteristics
VSD Source to Drain Diode Forward Voltage VGS = 0 V, IS = -2.0 A (Note 2)
trr Reverse Recovery Time
Qrr Reverse Recovery Charge
IF = -7.8 A, di/dt = 100 A/µs
-0.6 -1.2
66 106
44 70
V
ns
nC
Notes:
1. RθJA is determined with the device mounted on a 1 in2 pad 2 oz copper pad on a 1.5 x 1.5 in. board of FR-4 material. RθJC is guaranteed by design while RθCA is determined by
the user's board design.
a. 52 °C/W when mounted on
a 1 in2 pad of 2 oz copper.
b. 145 °C/W when mounted on a
minimum pad of 2 oz copper.
2. Pulse Test: Pulse Width < 300µs, Duty cycle < 2.0%.
3. The diode connected between the gate and source serves only as protection against ESD. No gate overvoltage rating is implied.
©2010 Fairchild Semiconductor Corporation
FDMA507PZ Rev.C
2
www.fairchildsemi.com

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डाउनलोड[ FDMA507PZ Datasheet.PDF ]


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