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P75N02LDG डेटा पत्रक PDF( Datasheet डाउनलोड )


डेटा पत्रक - N-Channel Logic Level Enhancement Mode Field Effect Transistor - Niko

भाग संख्या P75N02LDG
समारोह N-Channel Logic Level Enhancement Mode Field Effect Transistor
मैन्युफैक्चरर्स Niko 
लोगो Niko लोगो 
पूर्व दर्शन
1 Page
		
<?=P75N02LDG?> डेटा पत्रक पीडीएफ

P75N02LDG pdf
NIKO-SEM
N-Channel Logic Level Enhancement
Mode Field Effect Transistor
P75N02LDG
TO-252 (DPAK)
Lead-Free
On-State Drain Current1
Drain-Source On-State
Resistance1
Forward Transconductance1
ID(ON)
RDS(ON)
gfs V
VDS = 10V, VGS = 10V
VGS = 10V, ID = 30A
VGS = 7V, ID = 24A
DS = 15V, ID = 30A
70
5
6
16
7
8
DYNAMIC
Input Capacitance
Ciss
5000
Output Capacitance
Coss VGS = 0V, VDS = 15V, f = 1MHz
1800
Reverse Transfer Capacitance
Total Gate Charge2
Gate-Source Charge2
Gate-Drain Charge2
Turn-On Delay Time2
Rise Time2
Turn-Off Delay Time2
Fall Time2
Crss
Qg
Qgs
Qgd
td(on)
tr
td(off)
tf
VDS = 0.5V(BR)DSS, VGS = 10V,
ID = 35A
VDS = 15V, RL = 1
ID 30A, VGS = 10V, RGS = 2.5
800
140
40
75
7
7
24
6
SOURCE-DRAIN DIODE RATINGS AND CHARACTERISTICS (TC = 25 °C)
Continuous Current
Pulsed Current3 I
Forward Voltage1 V
IS
SM
SD I
F = IS, VGS = 0V
75
170
1.3
Reverse Recovery Time
trr
37
Peak Reverse Recovery Current
IRM(REC)
IF = IS, dlF/dt = 100A / µS
200
Reverse Recovery Charge
Qrr
1Pulse test : Pulse Width 300 µsec, Duty Cycle 2 .
2Independent of operating temperature.
3Pulse width limited by maximum junction temperature.
0.043
A
m
S
pF
nC
nS
A
V
nS
A
µC
REMARK: THE PRODUCT MARKED WITH “P75N02LDG”, DATE CODE or LOT #
Orders for parts with Lead-Free plating can be placed using the PXXXXXXXG parts name.
2 SEP-02-2004

विन्यास 3 पेज
डाउनलोड[ P75N02LDG Datasheet.PDF ]


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