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MX25V512C डेटा पत्रक PDF( Datasheet डाउनलोड )


डेटा पत्रक - 512K-BIT [x 1] 2.5V CMOS SERIAL FLASH - MACRONIX

भाग संख्या MX25V512C
समारोह 512K-BIT [x 1] 2.5V CMOS SERIAL FLASH
मैन्युफैक्चरर्स MACRONIX 
लोगो MACRONIX लोगो 
पूर्व दर्शन
1 Page
		
<?=MX25V512C?> डेटा पत्रक पीडीएफ

MX25V512C pdf
HARDWARE FEATURES
SCLK Input
- Serial clock input
• SI Input
- Serial Data Input
• SO Output
- Serial Data Output
• WP# pin
- Hardware write protection
• HOLD# pin
- pause the chip without diselecting the chip
• PACKAGE
- 8-land USON (2x3 mm, 0.6mm package height)
- 8-pin TSSOP (173mil)
- All Pb-free devices are RoHS Compliant
MX25V512C
GENERAL DESCRIPTION
The MX25V512C is a CMOS 524,288 bit serial Flash memory, which is configured as 65,536 x 8 internally. The
MX25V512C features a serial peripheral interface and software protocol allowing operation on a simple 3-wire bus.
The three bus signals are a clock input (SCLK), a serial data input (SI), and a serial data output (SO). Serial access
to the device is enabled by CS# input.
The MX25V512C provides sequential read operation on whole chip.
After program/erase command is issued, auto program/ erase algorithms which program/ erase and verify the spec-
ified page or sector/block locations will be executed. Program command is executed on page (256 bytes) basis, and
erase command is executes on chip or sector (4K-bytes).
To provide user with ease of interface, a status register is included to indicate the status of the chip. The status read
command can be issued to detect completion status of a program or erase operation via WIP bit.
When the device is not in operation and CS# is high, it is put in standby mode and draws less than 10uA DC cur-
rent.
The MX25V512C utilizes Macronix's proprietary memory cell, which reliably stores memory contents even after
100,000 program and erase cycles.
P/N: PM1470
REV. 1.2, JAN. 04, 2011
2
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