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MAX6751 डेटा पत्रक PDF( Datasheet डाउनलोड )


डेटा पत्रक - uP Reset Circuits - Maxim

भाग संख्या MAX6751
समारोह uP Reset Circuits
मैन्युफैक्चरर्स Maxim 
लोगो Maxim लोगो 
पूर्व दर्शन
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<?=MAX6751?> डेटा पत्रक पीडीएफ

MAX6751 pdf
MAX6746–MAX6753
μP Reset Circuits with Capacitor-Adjustable
Reset/Watchdog Timeout Delay
Absolute Maximum Ratings
VCC to GND...........................................................-0.3V to +6.0V
SRT, SWT, SET0, SET1, RESET IN, WDS, MR,
Continuous Power Dissipation (TA = +70°C)
8-Pin SOT23 (derate 5.1mW/°C above +70°C)...........408.2mW
WDI, to GND......................................…-0.3V to (VCC + 0.3V)
RESET (Push-Pull) to GND....................…-0.3V to (VCC + 0.3V)
RESET (Open-Drain) to GND.............................…-0.3V to +6.0V
Operating Temperature Range .........................-40°C to +125°C
Storage Temperature Range ............................-65°C to +150°C
Junction Temperature......................................................+150°C
Input Current (All Pins).....................................................±20mA
Lead Temperature (soldering, 10s) .................................+300°C
Output Current (RESET) ...................................................±20mA Soldering Temperature (reflow) .......................................+260°C
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any
other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
8 SOT23
PACKAGE CODE
K8+5
Outline Number
21-0078
Land Pattern Number
90-0176
Thermal Resistance, Single-Layer Board
Junction-to-Ambient (qJA)
Junction-to-Case (qJC)
Thermal Resistance, Four-Layer Board
N/A
800
Junction-to-Ambient (qJA)
196
Junction-to-Case (qJC)
70
For the latest package outline information and land patterns (footprints), go to www.maximintegrated.com/packages. Note that a “+”,
“#”, or “-” in the package code indicates RoHS status only. Package drawings may show a different suffix character, but the drawing
pertains to the package regardless of RoHS status.
Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-layer board.
For detailed information on package thermal considerations, refer to www.maximintegrated.com/thermal-tutorial.
Electrical Characteristics
(VCC = +1.2V to +5.5V, TA = TMIN to TMAX, unless otherwise specified. Typical values are at VCC = +5V and TA = +25°C.) (Note 1)
PARAMETER
SYMBOL
CONDITIONS
Supply Voltage
Supply Current
VCC Reset Threshold
VCC
ICC
VTH
TA = 0°C to +125°C
TA = -40°C to 0°C
VCC ≤ 5.5V
VCC ≤ 3.3V
VCC ≤ 2.0V
See VTH
selection table
TA = -40°C to +125°C
Hysteresis
VCC Reset Threshold
(MAX6752AKA32 Only)
Hysteresis (MAX6752AKA32 Only)
VCC to Reset Delay
VHYST
VHYST
TA = -40°C to +125°C
VCC falling from VTH + 100mV to VTH
-100mV at 1mV/µs
Reset Timeout Period
SRT Ramp Current
SRT Ramp Threshold
tRP
IRAMP
VRAMP
CSRT = 1500pF
CSRT = 100pF
VSRT = 0 to 1.23V; VCC = 1.6V to 5V
VCC = 1.6V to 5V (VRAMP rising)
MIN
1.0
1.2
VTH -
2%
3.136
0.65
TYP
5
4.2
3.7
0.8
0.80
MAX
5.5
5.5
10
9
8
VTH +
2%
UNITS
V
µA
V
%
3.224
V
0.90 %
20 µs
5.692
200
1.173
7.590
0.506
250
1.235
9.487
300
1.297
ms
nA
V
www.maximintegrated.com
Maxim Integrated │2

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