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FDD4685 डेटा पत्रक PDF( Datasheet डाउनलोड )


डेटा पत्रक - P-Channel PowerTrench MOSFET - Fairchild Semiconductor

भाग संख्या FDD4685
समारोह P-Channel PowerTrench MOSFET
मैन्युफैक्चरर्स Fairchild Semiconductor 
लोगो Fairchild Semiconductor लोगो 
पूर्व दर्शन
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<?=FDD4685?> डेटा पत्रक पीडीएफ

FDD4685 pdf
Electrical Characteristics TJ = 25°C unless otherwise noted
Symbol
Parameter
Test Conditions
Min Typ Max Units
Off Characteristics
BVDSS
BVDSS
TJ
IDSS
IGSS
Drain to Source Breakdown Voltage
Breakdown Voltage Temperature
Coefficient
Zero Gate Voltage Drain Current
Gate to Source Leakage Current
ID = –250µA, VGS = 0V
ID = –250µA, referenced to 25°C
VDS = –32V, VGS = 0V
VGS = ±20V, VGS = 0V
–40
V
–33 mV/°C
–1
±100
µA
nA
On Characteristics (Note 2)
VGS(th)
VGS(th)
TJ
Gate to Source Threshold Voltage
Gate to Source Threshold Voltage
Temperature Coefficient
rDS(on)
Static Drain to Source On Resistance
gFS Forward Transconductance
VGS = VDS, ID = –250µA
ID = –250µA, referenced to 25°C
VGS = –10V, ID = –8.4A
VGS = –4.5V, ID = –7A
VGS = –10V, ID = –8.4A, TJ=125°C
VDS = –5V, ID = –8.4A
–1
–1.6
4.9
23
30
33
23
–3 V
mV/°C
27
35 m
42
S
Dynamic Characteristics
Ciss
Coss
Crss
Rg
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Gate Resistance
VDS = –20V, VGS = 0V,
f = 1MHz
f = 1MHz
1790
260
140
4
2380
345
205
pF
pF
pF
Switching Characteristics
td(on)
tr
td(off)
tf
Qg(TOT)
Qgs
Qgd
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Total Gate Charge
Gate to Source Gate Charge
Gate to Drain “Miller” Charge
VDD = –20V, ID = –8.4A
VGS = –10V, RGEN = 6
VDD =–20V, ID = –8.4A
VGS = –5V
8 16 ns
15 27 ns
34 55 ns
14 26 ns
19 27 nC
5.6 nC
6.1 nC
Drain-Source Diode Characteristics
VSD Source to Drain Diode Forward Voltage
trr Reverse Recovery Time
Qrr Reverse Recovery Charge
VGS = 0V, IS = –8.4A (Note 2)
IF = –8.4A, di/dt = 100A/µs
–0.85
30
31
–1.2
45
47
V
ns
nC
Notes:
1: RθJA is the sum of the junction-to-case and case-to- ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins.
RθJC is guaranteed by design while RθJA is determined by the user’s board design.
a. 40°C/W when mounted on a 1 in2 pad of 2 oz copper
b. 96°C/W when mounted on a minimum pad.
2: Pulse Test: Pulse Width < 300µs, Duty cycle < 2.0%.
3: Starting TJ = 25°C, L = 3mH, IAS = 9A, VDD = 40V, VGS = 10V.
FDD4685 Rev.B
2 www.fairchildsemi.com

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डाउनलोड[ FDD4685 Datasheet.PDF ]


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