TA0038 डेटा पत्रक PDF( Datasheet डाउनलोड )

डेटा पत्रक - DC ACCURATE FSK MODULATOR - RF

 भाग संख्या TA0038 समारोह DC ACCURATE FSK MODULATOR मैन्युफैक्चरर्स RF लोगो पूर्व दर्शन 1 Page ``` TA0038 13 fractional number over the cycle rate of the pro- grammed bits. Different programmed bits can generate different fractional numbers and thus different synthe- sized frequencies. If b is the number of bits in the counter and s is the programmed word, then the frac- tional number generated is: # of Qa states per cycle = 2b-s # of 0s per cycle = 2b-s-1 Then fractional n = 2b-s-1 The synthesized frequency can then be calculated as F(ref)*(N+n). If s and n(s) represent the space fre- quency and m and n(m) represent the mark frequency, then the peak to peak frequency deviation can be cal- culated as F(ref)*(n(s)-n(m)). This method can pro- duce smaller deviations with fewer dividers than the previous method but offers fewer selections from which to chose. A simple form of this technique is described in Figure 1. It is implemented with a 4-bit counter and the values of s and m are chosen such that only 1 of the 4 bits is different. Therefore, the data to be modulated onto the carrier is used to set or clear that divider every cycle. An infinite numbers of cycles can occur at either the mark of space frequency without correction by the PLL therefore making this modulator accurate down to DC. Load 4 -b it C o u n te r A Qa B Qb C Qc D Qd C lk C arry Load out Modulus C on tro l P re s c ale r Div. by N / N+1 Phase D e te c to r FSK O utput VCO R e fe re n c e O scillator Reference Oscillator Load "5" Carry out Mod. control (Q a) Load "7" Carry out Mod. control (Q a) CDE F 5 6 7 8 9 ABCDE F 5 6 7 8 9 Duty Cycle 'n'= 5/11 = 0.454 CDE F 7 8 9 ABCDE F 7 8 9 ABCD Duty Cycle 'n' = 4/9 = 0.444 Figure 1. DC Accurate FSK Modulator In the example of Figure 1, a 4-bit counter is used to control the divider ratio of the prescaler in a PLL syn- thesizer. The Qa output toggles high and low except when the carry out is asserted. Then the Qa output stays high with the correct load value. For a loaded value of ‘5’, the Qa output will be low for 5 out of the 11 states of the counter, (16 -5-1)/2. This sets up a ratio or duty cycle of n=.454. The ‘B’ bit of the counter can be changed from a 0 to a 1 to change the load value from 5 to 7. In this case the Qa output is low for 4 out of 9 states, ((16-7-1)/2) for a duty cycle of n=.444. The ratios modify the prescaler to produce an output fre- quency with a fractional divide by ratio, that is 128.454 or 128.444. Therefore the output frequencies differ by (128.454 - 128.444) times the reference oscillator. The rate of change on the modulus control pin is very high relative to the PLL loop bandwidth so the changes are averaged or smoothed out over time. A simple hardware implementation of a radio link using this method is described here. A family of transmitter or transceiver ICs from RF Micro Devices offer the inter- nal PLL and dual modulus prescaler which can be used in this design. The RF2513 was chosen to dem- onstrate a simple low cost transmitter for USA ISM band applications. The RF2513 contains all the active circuitry necessary to implement a single IC FSK trans- mitter; a reference crystal oscillator, PLL, dual modulus prescaler, VCO, TX buffer amp, and PA. The RF2513 also has an internal varactor for tuning the VCO. By using printed inductors for the resonators, the external component count is minimized. A 74HC161 4-bit counter is used to implement the counter and a 74HC04 is used for the necessary inversion to load the counter and to buffer the reference oscillator used for the clock. The schematic of the final circuit is shown in Figure 2. #%% '!    \$            (      \$                (  \$    \$                                   &          '!   ! "!#   "!#     \$ !    \$%# !    \$   "!# #'!   \$ #'\$   ! #   & \$   #                      \$      \$        Figure 2. Example Schematic of DC Accurate Modulator 13-188 Copyright 1997-2000 RF Micro Devices, Inc. ``` विन्यास 6 पेज डाउनलोड [ TA0038 Datasheet.PDF ]

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