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UPD64083 डेटा पत्रक PDF( Datasheet डाउनलोड )


डेटा पत्रक - 3 Dimensional Y/C Separation IC with On-Chip Memory - NEC

भाग संख्या UPD64083
समारोह 3 Dimensional Y/C Separation IC with On-Chip Memory
मैन्युफैक्चरर्स NEC 
लोगो NEC लोगो 
पूर्व दर्शन
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<?=UPD64083?> डेटा पत्रक पीडीएफ

UPD64083 pdf
synchronization separator, and BPF circuit, all
of which can be achieved using a few transistors.
This not only facilitates board design, but also
significantly reduces the required mounting
space.
2. On-chip memory
Four-megabit EDO DRAM is the frame
memory used in conventional Y/C separation ICs
(µPD64082, etc.) to store frame delay data,
which is required in order to perform 3-D Y/C
separation. However, the memory interface that
connected this memory tended to be the source
of extremely disruptive noise that had a very
negative effect on the picture signals, leading to
degraded picture quality. With the µPD64083,
however, this noise source has been eliminated
by incorporating the memory on the chip, leaving
no picture quality degradation caused by
memory access noise.
3. Low power consumption
By incorporating the memory on the
µPD64083 IC chip using the latest fabrication
technology to create a single-chip product, the
power consumption of the chip during operation
has been lowered to about half the level of the
conventional IC. Moreover, the addition of a
sleep mode that can be activated by a command
sent over the I2C bus in cases when the set is
operating but this IC is not has enabled a further
50% (or more) reduction in the power
consumption.
4. Many added functions
The µPD64083 contains a function for
performing noise reduction on Y/C separated
signals, in addition to the 3-D Y/C separation
function itself. This 3-D noise reduction function
utilizes the frame memory and allows the
efficient reduction of just the noise, without
affecting the resolution of the picture.
A range of detection functions such as noise
detection, wide clear vision ID detection, and
ID-1 detection are also included, the results of
which can be read out from the I2C bus.
Other functional additions include vertical
border correction and horizontal peaking
functions implemented for luminance signals to
accentuate the edges of the picture, and a coring
function to enable simple and effective noise
reduction, thus providing broad picture quality
control.
µPD64083
On-chip 4 Mb memory
µPD64082
On-chip 10-bit Y-ADC
µPD64081B
8-bit system
4M EDO
DRAM
µPD64088
Clock
generator
2M FIFO
1M FIFO
Y-ADC
4M EDO
DRAM
Cost performance
˜1996
1997
1998
1999
2000
2001˜
Fig. 1 Development Roadmap of NEC's 3-D Y/C Separation ICs
10-bit digital
comp. input
Clamp
10-bit
Y-ADC
Bias 10-bit
C-ADC
Ext.
sync.
sep.
fSC in
BFP
fSC out
Sync.
sep.
Timing
generator
8fSC PLL
fSC/227.5fH
decoder
Y/C separator &
Y-noise reducer
Y Y-enhancer
Y-coring
10-bit
Y-DAC
C-Delay &
C-noise reducer
C
Non std.
detector
Motion
detector
WCV-ID
decoder
ID-1
decoder
Noise
detector
10-bit
Y-DAC
Power down
control
Frame delay memory
(4 Mb)
I2C bus
I/F
20 MHz
Fig. 2 µPD64083 Block Diagram

विन्यास 3 पेज
डाउनलोड[ UPD64083 Datasheet.PDF ]


शेयर लिंक


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