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FDD6030 डेटा पत्रक PDF( Datasheet डाउनलोड )


डेटा पत्रक - N-Channel Logic Level Enhancement Mode Field Effect Transistor - Fairchild Semiconductor

भाग संख्या FDD6030
समारोह N-Channel Logic Level Enhancement Mode Field Effect Transistor
मैन्युफैक्चरर्स Fairchild Semiconductor 
लोगो Fairchild Semiconductor लोगो 
पूर्व दर्शन
1 Page
		
<?=FDD6030?> डेटा पत्रक पीडीएफ

FDD6030 pdf
Electrical Characteristics TC=25oC unless otherwise noted
Symbol
Parameter
Test Conditions
Min Typ Max Units
OFF CHARACTERISTICS
BVDSS
Drain-Source Breakdown Voltage
IDSS Zero Gate Voltage Drain Current
IGSSF
Gate-Body Leakage, Forward
IGSSR
Gate-Body Leakage, Reverse
VGS = 0 V, ID = 250 µA
VDS = 24 V, VGS = 0 V
VGS = 20 V, VDS = 0 V
VGS = -20 V, VDS = 0 V
30
ON CHARACTERISTICS (Note 2)
VGS(TH)
Gate Threshold Voltage
RDS(ON)
Static Drain-Source
On-Resistance
VDS = VGS, ID = 250 µA
VGS = 10 V, ID = 9 A
VGS = 4.5 V, ID = 7.5 A
1
DRAIN-SOURCE DIODE CHARACTERISTICS AND MAXIMUM RATINGS
IS Maximum Continuous Drain-Source Diode Forward Current
VSD Drain-Source Diode Forward
Voltage
VGS = 0 V, IS = 2.3 A
Notes:
1. RθJA is the sum of the junction-to-case and case-to-ambient resistance where the case thermal reference is defined as the drain tab.
RθJC is guaranteed by design while RθJA is determined by the user's board design.
1
100
-100
V
µA
nA
nA
3
0.018
0.025
V
2.3 A
1.3 V
a) RθJA= 45oC/W when mounted on a
1in2 pad of 2oz copper.
b) RθJA= 96oC/W when mounted on a
minimum pad.
Scale 1 : 1 on letter size paper
2. Pulse Test: Pulse Width 300 µs, Duty Cycle 2.0%
FDD6030BL Rev. A

विन्यास 5 पेज
डाउनलोड[ FDD6030 Datasheet.PDF ]


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