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GPR27P512A डेटा पत्रक PDF( Datasheet डाउनलोड )


डेटा पत्रक - 512M-BIT NAND INTERFACE OTP - Generalplus

भाग संख्या GPR27P512A
समारोह 512M-BIT NAND INTERFACE OTP
मैन्युफैक्चरर्स Generalplus 
लोगो Generalplus लोगो 
पूर्व दर्शन
1 Page
		
<?=GPR27P512A?> डेटा पत्रक पीडीएफ

GPR27P512A pdf
GPR27P512A
Table of Contents
PAGE
1. FEATURES .................................................................................................................................................................................................. 3
2. BLOCK DIAGRAM ...................................................................................................................................................................................... 3
3. 48 TSOP PIN DESCRIPTIONS.................................................................................................................................................................... 4
3.1. PIN ASSIGNMENT .................................................................................................................................................................................. 4
4. FUNCTIONAL DESCRIPTIONS.................................................................................................................................................................. 5
4.1. OPERATION MODES ............................................................................................................................................................................... 5
4.2. OPERATION MODE ................................................................................................................................................................................. 5
4.3. OPERATION MODE DURING SERIAL READ ............................................................................................................................................... 5
4.4. OPERATION COMMANDS......................................................................................................................................................................... 6
4.5. I/O PIN CORRESPONDENCE TABLE DURING ADDRESS INPUT CYCLE (ADDRESS SETTING) ......................................................................... 6
4.5.1. When 00H or 01H command is set [Read mode (1), Read mode (2)] ...................................................................................... 6
4.5.2. When 50H command is set [Read mode (3)]............................................................................................................................ 6
4.6. AC TEST CONDITIONS............................................................................................................................................................................ 7
4.7. COMMAND LATCH CYCLE ....................................................................................................................................................................... 7
4.8. ADDRESS LATCH CYCLE......................................................................................................................................................................... 8
4.9. SERIAL ACCESS CYCLE AFTER READ (CLE=L, WE=H, ALE=L) ............................................................................................................... 8
4.10.READ OPERATION WITH CE DON'T CARE ................................................................................................................................................. 9
4.11. SEQUENTIAL READ................................................................................................................................................................................. 9
4.12.RELATIONSHIP BETWEEN COMMAND AND START ADDRESS (SA) DURING SEQUENTIAL READ ................................................................... 10
4.13.SEQUENTIAL READ CYCLE TIMING CHART(1) .........................................................................................................................................11
4.14.SEQUENTIAL READ CYCLE TIMING CHART(2) ........................................................................................................................................ 12
4.15.SEQUENTIAL READ CYCLE TIMING CHART(3) ........................................................................................................................................ 13
4.16.STATUS READ ...................................................................................................................................................................................... 14
4.17.ID READ .............................................................................................................................................................................................. 15
4.18.RESET CYCLE TIMING CHART ............................................................................................................................................................... 16
4.19.READY/BUSY.................................................................................................................................................................................... 16
4.20.USAGE CAUTIONS................................................................................................................................................................................ 17
4.20.1. Rated operation .................................................................................................................................................................. 17
4.20.2. Commands that can be input.............................................................................................................................................. 17
4.20.3. Command limitations during Busy period ........................................................................................................................... 17
4.20.4. Cautions regarding RE clock .............................................................................................................................................. 17
4.20.5. Cautions upon power application ....................................................................................................................................... 17
4.20.6. Cautions during read mode ................................................................................................................................................ 17
5. ELECTRICAL SPECIFICATIONS ............................................................................................................................................................. 18
5.1. ABSOLUTE MAXIMUM RATINGS ............................................................................................................................................................. 18
5.2. CAPACITANCE (TA = 25°C) ................................................................................................................................................................... 18
5.3. DC CHARACTERISTICS (TA = 0 TO 70°C, VCC = 2.7~3.6V) .................................................................................................................. 18
5.4. AC CHARACTERISTICS (TA = 0 TO 70°C, VCC = 2.7~3.6V) .................................................................................................................. 18
6. PACKAGE/PAD LOCATIONS ................................................................................................................................................................... 20
6.1. ORDERING INFORMATION ..................................................................................................................................................................... 20
6.2. PACKAGE INFORMATION ....................................................................................................................................................................... 20
7. DISCLAIMER............................................................................................................................................................................................. 22
8. REVISION HISTORY ................................................................................................................................................................................. 23
© Generalplus Technology Inc.
Proprietary & Confidential
2
Nov. 21, 2011
Version: 1.5

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भाग संख्याविवरणविनिर्माण
GPR27P512A512M-BIT NAND INTERFACE OTPGeneralplus
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