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CY14B116M डेटा पत्रक PDF( Datasheet डाउनलोड )


डेटा पत्रक - 16-Mbit (2048 K x 8/1024 K x 16) nvSRAM - Cypress Semiconductor

भाग संख्या CY14B116M
समारोह 16-Mbit (2048 K x 8/1024 K x 16) nvSRAM
मैन्युफैक्चरर्स Cypress Semiconductor 
लोगो Cypress Semiconductor लोगो 
पूर्व दर्शन
1 Page
		
<?=CY14B116M?> डेटा पत्रक पीडीएफ

CY14B116M pdf
CY14B116K/CY14B116M
Logic Block Diagram[1, 2, 3]
A0-A11
VCC VCAP VRTCcap VRTCbat
QUANTUMTRAP
4096 X 4096
STORE
STATIC RAM
ARRAY
4096 X 4096
RECALL
POWER CONTROL
SLEEP MODE
CONTROL
ZZ
STORE / RECALL
CONTROL
HSB
SOFTWARE
DETECT
A2-A14
OE [4]
CE
WE
DQ 0-DQ 15
COLUMN IO
COLUMN DECODER
A12-A20
BLE
BHE
ZZ
RTC
X out
X in
INT
MUX
A0-A20
Notes
1. Address A0–A20 for ×8 configuration and address A0–A19 for ×16 configuration.
2. Data DQ0–DQ7 for ×8 configuration and data DQ0–DQ15 for ×16 configuration.
3. BLE, BHE are applicable for x16 configuration.
4. TSOP II package is offered in single CE and BGA package is offered in dual CE options. In this datasheet, for a dual CE device, CE refers to the internal logical
combination of CE1 and CE2 such that when CE1 is LOW and CE2 is HIGH, CE is LOW. For all other cases CE is HIGH.
Document #: 001-67786 Rev. *J
Page 2 of 42

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