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CE3524K3 डेटा पत्रक PDF( Datasheet डाउनलोड )


डेटा पत्रक - 24GHz Super Low Noise FET - CEL

भाग संख्या CE3524K3
समारोह 24GHz Super Low Noise FET
मैन्युफैक्चरर्स CEL 
लोगो CEL लोगो 
पूर्व दर्शन
1 Page
		
<?=CE3524K3?> डेटा पत्रक पीडीएफ

CE3524K3 pdf
PRELIMINARY DATASHEET
PIN CONFIGURATION AND
INTERNAL BLOCK DIAGRAM
Pin No.
1
2
3
4
Pin Name
Source
Drain
Source
Gate
CE3524K3
ABSOLUTE MAXIMUM RATINGS
(TA = +25˚C, unless otherwise specified)
Parameter
Symbol
Rating
Drain to Source Voltage
VDS 4.0
Gate to Source Voltage
VGS -3.0
Drain Current
ID IDSS
Gate Current
IG 80
Total Power Dissipation
Ptot 125
Channel Temperature
Tch +150
Storage Temperature
Tstg -55 to +125
Operation Temperature
Top -55 to +125Note
Note Refer to Total Power Dissipation vs. Ambient Temperature graph on page 4
Unit
V
V
mA
µA
mW
°C
°C
°C
RECOMMENDED OPERATING RANGE
(TA = +25˚C, unless otherwise specified)
Parameter
Symbol
MIN.
Drain to Source Voltage
Drain Current
VDS TBD
ID TBD
TYP.
+2
10
MAX.
TBD
TBD
Unit
V
mA
This document is subject to change without notice.
2

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डाउनलोड[ CE3524K3 Datasheet.PDF ]


शेयर लिंक


अनुशंसा डेटापत्रक

भाग संख्याविवरणविनिर्माण
CE3524K324GHz Super Low Noise FETCEL
CEL


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