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NB3H83905C डेटा पत्रक PDF( Datasheet डाउनलोड )


डेटा पत्रक - 1.8V/2.5V/3.3V Crystal Input to 1:6 LVTTL/LVCMOS Clock Fanout Buffer - ON Semiconductor

भाग संख्या NB3H83905C
समारोह 1.8V/2.5V/3.3V Crystal Input to 1:6 LVTTL/LVCMOS Clock Fanout Buffer
मैन्युफैक्चरर्स ON Semiconductor 
लोगो ON Semiconductor लोगो 
पूर्व दर्शन
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<?=NB3H83905C?> डेटा पत्रक पीडीएफ

NB3H83905C pdf
NB3H83905C
XTAL_OUT 1
16 XTAL_IN/CLK
ENABLE2 2
15 ENABLE1
20 19 18 17 16
GND
BCLK0
VDDO
BCLK1
GND
3
4
5
6
7
14 BCLK5
13 VDDO
12 BCLK4
11 GND
10 BCLK3
GND
GND
BCLK0
VDDO
BCLK1
1
2
3
4
5
EP
6 7 8 9 10
BCLK2
8 9 VDD
SOIC16/TSSOP16
Figure 2. Pinout Configuration (Top View)
QFN20
Exposed Pad
15 BCLK5
14 VDDO
13 BCLK4
12 GND
11 GND
Table 1. PIN DESCRIPTION
SOIC16 /
TSSOP16
QFN20
Name
1 19 XTAL_OUT
2 20 ENABLE 2
3, 7, 11
4, 6, 8,
10, 12, 14
5, 13
1, 2, 6, 7,
11, 12
3, 5, 8,
10, 13, 15
4, 14
GND
BCLK0, 1,
2, 3, 4, 5
VDDO
9 9 VDD
16 NC
15 17 ENABLE 1
16 18 XTAL_IN/
CLK
EP
I/O
Crystal Interface
LVTTL /
LVCMOS Input
GND
LVCMOS
Outputs
POWER
POWER
LVTTL /
LVCMOS Input
Crystal Interface
Description
Oscillator Output to drive Crystal
Synchronous Enable Input for BCLK5 Output. Switches only when
HIGH. Open default condition HIGH due to an internal pullup resistor
to VCC.
GND Supply pins. All GND, VDD and VDDO pins must be externally
connected to power supply to guarantee proper operation.
Buffered Clock Outputs
Positive
must be
Supply voltage for outputs. All
externally connected to power
GsuNpDp,lyVtDoDgaunadraVntDeDeOpproinpser
operation. Bypass with 0.01 mF cap to GND.
Positive Supply voltage for core. All GND, VDD and VDDO pins must
be externally connected to power supply to guarantee proper
operation. Bypass with 0.01 mF cap to GND.
No Connect
Synchronous Enable Input for BCLK0/1/2/3/4 Output block. Switches
only when HIGH. Open default condition HIGH due to an internal
pullup resistor to VCC
Oscillator Input from Crystal. Single ended Clock Input.
The Exposed Pad (EP) on the QFN20 package bottom is thermally
connected to the die for improved heat transfer out of package. The
exposed pad must be attached to a heatsinking conduit. The pad is
not electrically connected to the die, but is recommended to be
electrically and thermally connected to GND on the PC board.
http://onsemi.com
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डाउनलोड[ NB3H83905C Datasheet.PDF ]


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अनुशंसा डेटापत्रक

भाग संख्याविवरणविनिर्माण
NB3H83905C1.8V/2.5V/3.3V Crystal Input to 1:6 LVTTL/LVCMOS Clock Fanout BufferON Semiconductor
ON Semiconductor


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