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PJD50N10L डेटा पत्रक PDF( Datasheet डाउनलोड )


डेटा पत्रक - 100V N-Channel Enhancement Mode MOSFET - Pan Jit International

भाग संख्या PJD50N10L
समारोह 100V N-Channel Enhancement Mode MOSFET
मैन्युफैक्चरर्स Pan Jit International 
लोगो Pan Jit International लोगो 
पूर्व दर्शन
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<?=PJD50N10L?> डेटा पत्रक पीडीएफ

PJD50N10L pdf
PPJU50N10L / PJD50N10L
Electrical
Characteristics
o
(TA=25 C
unless
otherwise
noted)
PARAMETER
Static
Drain-Source Breakdown Voltage
Gate Threshold Voltage
Drain-Source On-State Resistance
Zero Gate Voltage Drain Current
Gate-Source Leakage Current
Dynamic (Note 5)
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Turn-On Delay Time
Turn-On Rise Time
Turn-Off Delay Time
Turn-Off Fall Time
Drain-Source Diode
Maximum Continuous Drain-Source
Diode Forward Current
Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge
SYMBOL
BVDSS
VGS(th)
RDS(on)
IDSS
IGSS
Qg
Qgs
Qgd
Ciss
Coss
Crss
td(on)
tr
td(off)
tf
IS
VSD
trr
Qrr
TEST CONDITION
VGS=0V,ID=250uA
VDS=VGS,ID=250uA
VGS=10V,ID=30A
VDS=80V,VGS=0V
VGS=+20V,VDS=0V
VDS=50V, ID=30A,
VGS=10V (Note 2,3)
VDS=15V, VGS=0V,
f=1.0MHZ
VDD=50V, ID=30A,
VGS=10V, RG=3Ω
(Note 2,3)
---
IS=1A,VGS=0V
VGS=0V, IS=20A
dIF/ dt=100A/us (Note 2)
NOTES :
1. The test by surface mounted on 1 inch FR4 board with 2oz copper.
2. L=0.1mH, IAS=40A, VDD=25V, VGS=10V, RG=25ohm, Starting TJ=25oC
3. The Power dissipation is limit by 150junction temperature.
4. Pulse width<300us, Duty cycle<2%
5. Guaranteed by design, not subject to production testing
MIN. TYP. MAX. UNITS
100 - - V
2.5 3.57 4.5
-
18.3
22
V
mΩ
- 0.01 1.0 uA
- +10 +100 nA
- 29 -
- 9.5 -
- 10 -
- 1643 -
- 257 -
- 63 -
- 19 -
- 56 -
- 25 -
- 13 -
nC
pF
ns
- - 50 A
- 0.67 1.0 V
- 31 - ns
- 38 - uC
April 9,2015-REV.00
Page 2

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